Virtual Sequencer vs Virtual Sequence

The single most common interview question in UVM. What is the difference, and do you always need a Virtual Sequencer?

The Switchboard Pattern

A Virtual Sequencer is a static architectural component that acts as a hub for all physical sequencers in the testbench. It doesn't process items; it only holds pointers (handles) to the components that do.

Why static components?

By placing sequencer handles in a uvm_component, you allow the testbench environment to set up all connections during the connect_phase. This makes the stimulus layer independent of the physical topology.

Traditional vs Modern Flows

The UVM community is split between two primary ways of starting virtual sequences. Both have their place in modern verification.

Method	Traditional (Virtual Sqr)	Modern (Sequencer-less)
Start Method	`vseq.start(v_sqr)`	`vseq.start(null)`
Handle Binding	Automatic via `p_sequencer`	Manual assignment in the Test
Complexity	Higher (More classes)	Lower (Faster to code)

Architectural Implementation

Virtual Sequencer: The Hub


class soc_vsqr extends uvm_sequencer;
    `uvm_component_utils(soc_vsqr)
    // Handles to physical sequencers
    axi_sequencer axi_sqr;
    eth_sequencer eth_sqr;
    function new(string name, uvm_component parent);
        super.new(name, parent);
    endfunction
endclass

Environment: The Wiring


function void connect_phase(uvm_phase phase);
    // Connect virtual handles to actual component instances
    v_sqr.axi_sqr = axi_agt.sqr;
    v_sqr.eth_sqr = eth_agt.sqr;
endfunction

Scaling for SoC

In monolithic SoC testbenches, the Virtual Sequencer can become cluttered. The best practice is to use Hierarchical Virtual Sequencers—where a top-level sequencer holds handles to sub-virtual sequencers (e.g., Audio Subsystem, Video Subsystem).

The Gold Rule

Never perform physical pin-wiggling in a virtual sequence. If you need "side-band" signals, pass a Config Object or Virtual Interface handle through the Virtual Sequencer instead of cluttering the sequence logic.

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