APB Versions: APB3 vs APB4
The simple peripheral bus that evolved to support secure systems and error handling.
1. APB Evolution
APB2 (Original)
Basic Setup/Enable phases. No Error response. Master assumes all writes succeed.
APB3 (Virtually standard)
Added PREADY (Wait states) and PSLVERR (Error reporting). Allows Slave to stall the Master or report failure (e.g., writing to Read-Only reg).
APB4 (Modern)
Added PPROT (Protection Level - Secure/Non-Secure) and PSTRB (Write Strobes for sparse byte writes).
2. Common Questions
Why does APB take 2 cycles?
APB is designed for low power and simplicity, not speed.
Cycle 1 (Setup): Address/Control change, Enable=0. Reduced power glitches.
Cycle 2 (Access): Enable=1. Data is sampled.
This simple state machine requires no complex arbitration.
Cycle 1 (Setup): Address/Control change, Enable=0. Reduced power glitches.
Cycle 2 (Access): Enable=1. Data is sampled.
This simple state machine requires no complex arbitration.