The idle state of the UART line is HIGH (1). A transaction begins when the line is pulled LOW.
Bit Definitions
- Start Bit (Always 0): Signals the receiver that a byte is coming. Synchronizes the internal clock counter.
- Data Bits (5-9 bits): Usually 8 bits (1 byte). LSB sent first.
- Parity Bit (Optional): Used for error checking. Can be Even, Odd, or None.
- Stop Bit (Always 1): Guarantees a transition period before the next Start bit. Can be 1, 1.5, or 2 bits long.