The adapter is a bridge. It converts a Generic Register Transaction (`uvm_reg_bus_op`) into a Bus Specific Sequence Item (e.g., `ahb_item`), and vice versa.
class my_adapter extends uvm_reg_adapter;
virtual function uvm_sequence_item reg2bus(const ref uvm_reg_bus_op rw);
ahb_item pkt = ahb_item::type_id::create("pkt");
pkt.addr = rw.addr;
pkt.data = rw.data;
pkt.write = (rw.kind == UVM_WRITE);
return pkt;
endfunction
virtual function void bus2reg(uvm_sequence_item bus_item, ref uvm_reg_bus_op rw);
ahb_item pkt;
$cast(pkt, bus_item);
rw.addr = pkt.addr;
rw.data = pkt.data;
rw.kind = pkt.write ? UVM_WRITE : UVM_READ;
endfunction
endclass