I2S (Inter-IC Sound) Protocol

A standard bus interface for connecting digital audio devices together.

Why I2S? - Dedicated for Audio

I2S (Inter-IC Sound) was also developed by Philips Semiconductor (in 1986). While I2C was great for control signals (like "Volume Up"), it was terrible for the actual audio data stream.

The Jitter Problem

Separation of Concerns: Audio data (PCM) requires precise, ceaseless timing. Control signals (I2C) are bursty and sporadic. Mixing them creates jitter, ruining audio quality.
I2S Solution: It separates the clock and data signals entirely from the control path.
Synchronization: It uses a continuous clock (SCK) and a Word Select (WS) to ensure the Left/Right channels are perfectly aligned, sample by sample.

Key Signals

Signal Name	Description	Function
SCK (BCLK)	Serial/Bit Clock	Pulses once for each bit of data. Generated by Master.
WS (LRCLK)	Word Select	Indicates the channel being transmitted. 0 (Low) = Left Channel 1 (High) = Right Channel.
SD (SDATA)	Serial Data	Transmits audio data (MSB first) in 2's complement format.

Note on WS: The Word Select signal changes one clock cycle before the MSB of the next word is transmitted. This allows the receiver to store the previous word and clear the register for the next one.

Timing Diagram

In standard I2S mode:

Data is transmitted MSB first.
There is a 1-bit delay between the WS transition and the MSB of the data.

Verification Challenges

Clock Generation: Ensuring SCK and WS are perfectly synchronized.
Setup/Hold Violations: Data must be stable on the rising edge of SCK (receiver samples here).
Channel Swapping: Verifying that Left Channel data doesn't leak into the Right Channel.

Next I2S Protocol/Handshake